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toffler Cheater Reputation: 0
Joined: 27 Sep 2012 Posts: 38
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Posted: Sun Oct 08, 2017 6:45 pm Post subject: Glitches in 64 bit mode |
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Hi,
I load a 64 bit program written in C++/ASM and the ASM code shown in mem view is not what it is in .asm file. When I try to step over instructions the code I see changes on the fly.
Also, values of the flag register are not what they should be.
Other debuggers show the code properly.
Is it a known general bug with a general fix or should I provide the source code / executable to investigate this?
Using CE 6.7 under Win 8.1
Thank you!
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toffler Cheater Reputation: 0
Joined: 27 Sep 2012 Posts: 38
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Posted: Mon Oct 09, 2017 4:51 am Post subject: |
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UPDATE: It seems that CE doesn't understand vmovq command. This is the original code:
Code: |
00007FF792192910 | 44 8B 1D E9 36 00 00 | mov r11d,dword ptr ds:[<num_test>] | asm.asm:12
00007FF792192917 | 48 8B 05 22 3E 00 00 | mov rax,qword ptr ds:[<a_inx>] | asm.asm:19
00007FF79219291E | 48 8B 0D FB 3D 00 00 | mov rcx,qword ptr ds:[<a_iny>] | asm.asm:20, rcx:"themewnd"
00007FF792192925 | 48 8B 1D 1C 3E 00 00 | mov rbx,qword ptr ds:[7FF792196748] | asm.asm:22
00007FF79219292C | 4C 8B 05 F5 3D 00 00 | mov r8,qword ptr ds:[7FF792196728] | asm.asm:23
00007FF792192933 | F3 0F 6F 05 15 3E 00 00 | movdqu xmm0,xmmword ptr ds:[7FF792196750] | asm.asm:25
00007FF79219293B | F3 0F 6F 0D ED 3D 00 00 | movdqu xmm1,xmmword ptr ds:[7FF792196730] | asm.asm:26
00007FF792192943 | 48 03 C1 | add rax,rcx | asm.asm:28, rcx:"themewnd"
00007FF792192946 | 49 13 D8 | adc rbx,r8 | asm.asm:29
00007FF792192949 | C4 E1 F9 6E D0 | vmovq xmm2,rax | asm.asm:32
00007FF79219294E | 66 0F 73 FA 08 | pslldq xmm2,8 | asm.asm:33
00007FF792192953 | 66 48 0F 3A 22 D3 08 | pinsrq xmm2,rbx,8 | asm.asm:34
00007FF79219295A | C4 E1 F9 7E C0 | vmovq rax,xmm0 | asm.asm:37
00007FF79219295F | C4 E1 F9 7E C9 | vmovq rcx,xmm1 | asm.asm:38, rcx:"themewnd"
00007FF792192964 | 66 48 0F 3A 16 C3 0F | pextrq rbx,xmm0,F | asm.asm:39
00007FF79219296B | 66 49 0F 3A 16 C8 0F | pextrq r8,xmm1,F | asm.asm:40
00007FF792192972 | 48 13 C1 | adc rax,rcx | asm.asm:42, rcx:"themewnd"
00007FF792192975 | 49 13 D8 | adc rbx,r8 | asm.asm:43
00007FF792192978 | C4 E3 6D 38 D2 01 | vinserti128 ymm2,ymm2,xmm2,1 | asm.asm:46
00007FF79219297E | C4 E1 F9 6E D0 | vmovq xmm2,rax | asm.asm:49
00007FF792192983 | 66 0F 73 FA 08 | pslldq xmm2,8 | asm.asm:50
00007FF792192988 | 66 48 0F 3A 22 D3 08 | pinsrq xmm2,rbx,8 | asm.asm:51
00007FF79219298F | C3 | ret | asm.asm:53 |
and this is what I get in CE:
Code: | ecc.a_add_32a - 44 8B 1D E9360000 - mov r11d,[ecc.num_test] { [000F4240] }
ecc.a_add_32a+7- 48 8B 05 223E0000 - mov rax,[ecc.a_inx] { [00000000] }
ecc.a_add_32a+E- 48 8B 0D FB3D0000 - mov rcx,[ecc.a_iny] { [00000000] }
ecc.a_add_32a+15- 48 8B 1D 1C3E0000 - mov rbx,[ecc.a_inx+8] { [00000000] }
ecc.a_add_32a+1C- 4C 8B 05 F53D0000 - mov r8,[ecc.a_iny+8] { [00000000] }
ecc.a_add_32a+23- F3 0F6F 05 153E0000 - movdqu xmm0,[ecc.a_inx+10] { [00000000] }
ecc.a_add_32a+2B- F3 0F6F 0D ED3D0000 - movdqu xmm1,[ecc.a_iny+10] { [00000000] }
ecc.a_add_32a+33- 48 03 C1 - add rax,rcx
ecc.a_add_32a+36- 49 13 D8 - adc rbx,r8
ecc.a_add_32a+39- C4 E1 - les esp,ecx
ecc.a_add_32a+3B- F9 - stc
ecc.a_add_32a+3C- 6E - outsb
ecc.a_add_32a+3D- D0 66 0F - shl byte ptr [rsi+0F],1
ecc.a_add_32a+40- 73 FA - jae ecc.a_add_32a+3C
ecc.a_add_32a+42- 08 66 48 - or [rsi+48],ah
ecc.a_add_32a+45- 0F -
ecc.a_add_32a+46- 3A 22 - cmp ah,[rdx]
ecc.a_add_32a+48- D3 08 - ror [rax],cl
ecc.a_add_32a+4A- C4 E1 - les esp,ecx
ecc.a_add_32a+4C- F9 - stc
ecc.a_add_32a+4D- 7E C0 - jle ecc.a_add_32a+F
ecc.a_add_32a+4F- C4 E1 - les esp,ecx
ecc.a_add_32a+51- F9 - stc
ecc.a_add_32a+52- 7E C9 - jle ecc.a_add_32a+1D
ecc.a_add_32a+54- 66 48 0F -
ecc.a_add_32a+57- 3A 16 - cmp dl,[rsi]
ecc.a_add_32a+59- C3 - ret
ecc.a_add_32a+5A- 0F66 49 0F - pcmpgtd mm1,[rcx+0F]
ecc.a_add_32a+5E- 3A 16 - cmp dl,[rsi]
ecc.a_add_32a+60- C8 0F48 13 - enter 480F,13 { 18447 }
ecc.a_add_32a+64- C1 49 13 D8 - ror [rcx+13],-28 { 216 }
ecc.a_add_32a+68- C4 E3 - les esp,ebx
ecc.a_add_32a+6A- 6D - insd
ecc.a_add_32a+6B- 38 D2 - cmp dl,dl
ecc.a_add_32a+6D- 01 C4 - add esp,eax
ecc.a_add_32a+6F- E1 F9 - loope ecc.a_add_32a+6A
ecc.a_add_32a+71- 6E - outsb
ecc.a_add_32a+72- D0 66 0F - shl byte ptr [rsi+0F],1
ecc.a_add_32a+75- 73 FA - jae ecc.a_add_32a+71
ecc.a_add_32a+77- 08 66 48 - or [rsi+48],ah
ecc.a_add_32a+7A- 0F -
ecc.a_add_32a+7B- 3A 22 - cmp ah,[rdx]
ecc.a_add_32a+7D- D3 08 - ror [rax],cl
ecc.a_add_32a+7F- C3 - ret |
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Dark Byte Site Admin Reputation: 458
Joined: 09 May 2003 Posts: 25287 Location: The netherlands
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Posted: Mon Oct 09, 2017 9:59 am Post subject: |
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the vector instruction set is not yet implemented (a lot of cpu's that are still suitable for games of these days don't support the vector instructions either, and most game developers don't use them for game mechanics, if they use it at all)
but the github source version does suppport replacing the disassembler with gnu binutils that do support it
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